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1

Cloud federation formation using genetic and evolutionary game theoretical models

Hammoud, Ahmad, Mourad, Azzam, Otrok, Hadi, Wahab, Omar Abdel, Harmanani, Haidar

Journal:

Future Generation Computer Systems

Year:

2020

Language:

english

File:

PDF, 1.87 MB

english, 2020

2

Critical Impact of Social Networks Infodemic on Defeating Coronavirus COVID-19 Pandemic: Twitter-Based Study and Research Directions

Mourad, A., Srour, A., Harmanani, H., Jenainati, C., Arafeh, M.

Journal:

IEEE Transactions on Network and Service Management

Year:

2020

File:

PDF, 2.98 MB

2020

3

Geographical Structure of the Y-chromosomal Genetic Landscape of the Levant: A coastal-inland contrast

Mirvat El-Sibai, Daniel E. Platt, Marc Haber, Yali Xue, Sonia C. Youhanna, R. Spencer Wells, Hassan Izaabel, May F. Sanyoura, Haidar Harmanani, Maziar Ashrafian Bonab, Jaafar Behbehani, Fuad Hashwa, C

Journal:

Annals of Human Genetics

Year:

2009

Language:

english

File:

PDF, 646 KB

english, 2009

4

A Stochastic Chartist–Fundamentalist Model with Time Delays

Ghassan Dibeh, Haidar M. Harmanani

Journal:

Computational Economics

Year:

2012

Language:

english

File:

PDF, 341 KB

english, 2012

5

Genetic Algorithm for Solving Site Layout Problem with Unequal-Size and Constrained Facilities

Zouein, P. P., Harmanani, H., Hajar, A.

Journal:

Journal of Computing in Civil Engineering

Year:

2002

Language:

english

File:

PDF, 622 KB

english, 2002

6

[IEEE 2016 IEEE International Symposium on Circuits and Systems (ISCAS) - Montréal, QC, Canada (2016.5.22-2016.5.25)] 2016 IEEE International Symposium on Circuits and Systems (ISCAS) - An all-digital fast tracking switching converter with a programmable order loop controller for envelope tracking RF power amplifiers

Anabtawi, Nijad, Ferzli, Rony, Harmanani, Haidar M.

Year:

2016

Language:

english

File:

PDF, 1.84 MB

english, 2016

7

[IEEE 2016 IEEE International Symposium on Circuits and Systems (ISCAS) - Montréal, QC, Canada (2016.5.22-2016.5.25)] 2016 IEEE International Symposium on Circuits and Systems (ISCAS) - A single switcher combined series parallel hybrid envelope tracking amplifier for wideband RF power amplifier applications

Anabtawi, Nijad, Ferzli, Rony, Harmanani, Haidar M.

Year:

2016

Language:

english

File:

PDF, 1.67 MB

english, 2016

8

A hybrid heuristic approach to optimize rule-based software quality estimation models

D. Azar, H. Harmanani, R. Korkmaz

Journal:

Information and Software Technology

Year:

2009

Language:

english

File:

PDF, 923 KB

english, 2009

9

Option pricing during post-crash relaxation times

Ghassan Dibeh, Haidar M. Harmanani

Journal:

Physica A: Statistical Mechanics and its Applications

Year:

2007

Language:

english

File:

PDF, 350 KB

english, 2007

10

A neural networks algorithm for data path synthesis

Haidar M. Harmanani

Journal:

Computers & Electrical Engineering

Year:

2003

Language:

english

File:

PDF, 276 KB

english, 2003

11

[IEEE 2008 Joint International IEEE Northeast Workshop on Circuits and Systems (NEWCAS) and TAISA Conference (NEWCAS-TAISA) - Montreal, QC, Canada (2008.06.22-2008.06.25)] 2008 Joint 6th International IEEE Northeast Workshop on Circuits and Systems and TAISA Conference - A method for efficient mapping and reliable routing for NoC architectures with minimum bandwidth and area

Harmanani, Haidar M., Farah, Rana

Year:

2008

Language:

english

File:

PDF, 289 KB

english, 2008

12

[IEEE 2010 IEEE International SOC Conference (SOCC) - Las Vegas, NV, USA (2010.09.27-2010.09.29)] 23rd IEEE International SOC Conference - A method for efficient NoC test scheduling using deterministic routing

Farah, Rana, Harmanani, Haidar

Year:

2010

Language:

english

File:

PDF, 784 KB

english, 2010

13

[IEEE Comput. Soc. Press 1993 International Conference on Computer Aided Design (ICCAD) - Santa Clara, CA, USA (7-11 Nov. 1993)] Proceedings of 1993 International Conference on Computer Aided Design (ICCAD) - An improved method for RTL synthesis with testability tradeoffs

Harmanani, H., Papachristou, C.A.

Year:

1993

Language:

english

File:

PDF, 621 KB

english, 1993

14

[IEEE The 2nd Annual IEEE Northeast Workshop on Circuits and Systems, 2004. NEWCAS 2004. - Montreal, Canada (20-23 June 2004)] The 2nd Annual IEEE Northeast Workshop on Circuits and Systems, 2004. NEWCAS 2004. - Distributed control in testable high-level synthesis with low area and power overhead

Harmanani, H., Marrouche, W.

Year:

2004

Language:

english

File:

PDF, 328 KB

english, 2004

15

[IEEE The 2nd Annual IEEE Northeast Workshop on Circuits and Systems, 2004. NEWCAS 2004. - Montreal, Canada (20-23 June 2004)] The 2nd Annual IEEE Northeast Workshop on Circuits and Systems, 2004. NEWCAS 2004. - An incremental approach for test scheduling and synthesis using genetic algorithms

Harmanani, H., Hajar, A.

Year:

2004

Language:

english

File:

PDF, 311 KB

english, 2004

16

[IEEE Integration (IRI) - Las Vegas, NV, USA (2011.08.3-2011.08.5)] 2011 IEEE International Conference on Information Reuse & Integration - Heuristic approaches for optimizing the performance of rule-based classifiers

Azar, Danielle, Harmanani, Haidar

Year:

2011

Language:

english

File:

PDF, 134 KB

english, 2011

17

Test bus assignment, sizing, and partitioning for system-on-chip

Harmanani, Haidar, Sawan, Rachel

Journal:

Canadian Journal of Electrical and Computer Engineering

Year:

2007

Language:

english

File:

PDF, 770 KB

english, 2007

18

[IEEE 2010 IEEE 23rd Canadian Conference on Electrical and Computer Engineering - CCECE - Calgary, AB, Canada (2010.05.2-2010.05.5)] CCECE 2010 - Estimating test cost during data path and controller synthesis with low power overhead

Harmanani, Haidar M., Kodeih, Maya

Year:

2010

Language:

english

File:

PDF, 141 KB

english, 2010

19

[IEEE 2006 IEEE North-East Workshop on Circuits and Systems - Gatineau, QC, Canada (2006.6.18-2006.6.18)] 2006 IEEE North-East Workshop on Circuits and Systems - On Power-Constrained System-On-Chip Test Scheduling Using Precedence Relationships

Harmanani, Haidar, Salamy, Hassan

Year:

2006

Language:

english

File:

PDF, 129 KB

english, 2006

20

[IEEE 2012 IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS) - Boise, ID, USA (2012.08.5-2012.08.8)] 2012 IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS) - An effective solution to thermal-aware test scheduling on network-on-chip using multiple clock rates

Salamy, Hassan, Harmanani, Haidar

Year:

2012

Language:

english

File:

PDF, 191 KB

english, 2012

21

[IEEE Comput. Soc. Press EURO-DAC '92: European Design Automation Conference - Hamburg, Germany (7-10 Sept. 1992)] Proceedings EURO-DAC '92: European Design Automation Conference - SYNTEST: an environment for system-level design for test

Harmanani, H., Papachristou, C., Chiu, S., Nourani, M.

Year:

1992

Language:

english

File:

PDF, 649 KB

english, 1992

22

[IEEE 2007 IEEE North-East Workshop on Circuits and Systems (NEWCAS 2007) - Montreal, QC, Canada (2007.08.5-2007.08.8)] 2007 IEEE Northeast Workshop on Circuits and Systems - Test time minimization for system-on-chip with test bus assignment and sizing

Harmanani, Haidar M., Sawan, Rachel

Year:

2007

Language:

english

File:

PDF, 187 KB

english, 2007

23

[IEEE Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05) - Banff, Alta., Canada (2005.07.20-2005.07.24)] Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05) - A hybrid distributed test generation method using deterministic and genetic algorithms

Harmanani, H., Karablieh, B.

Year:

2005

Language:

english

File:

PDF, 128 KB

english, 2005

24

[IEEE 2008 Joint International IEEE Northeast Workshop on Circuits and Systems (NEWCAS) and TAISA Conference (NEWCAS-TAISA) - Montreal, QC, Canada (2008.06.22-2008.06.25)] 2008 Joint 6th International IEEE Northeast Workshop on Circuits and Systems and TAISA Conference - Integrating wrapper design, TAM assignment, and test scheduling for SOC test optimization

Harmanani, Haidar M., Farah, Rana

Year:

2008

Language:

english

File:

PDF, 411 KB

english, 2008

25

[IEEE 2011 24th IEEE Canadian Conference on Electrical and Computer Engineering (CCECE) - Niagara Falls, ON, Canada (2011.05.8-2011.05.11)] 2011 24th Canadian Conference on Electrical and Computer Engineering(CCECE) - An optimal formulation for test scheduling network-on-chip using multiple clock rates

Salamy, Hassan, Harmanani, Haidar M.

Year:

2011

Language:

english

File:

PDF, 135 KB

english, 2011

26

Thermal-aware test scheduling using network-on-chip under multiple clock rates

Salamy, Hassan, Harmanani, Haidar M.

Journal:

International Journal of Electronics

Year:

2013

Language:

english

File:

PDF, 652 KB

english, 2013

27

[IEEE The 3rd International IEEE-NEWCAS Conference, 2005. - Quebec City, Canada (19-22 June, 2005)] The 3rd International IEEE-NEWCAS Conference, 2005. - Power-Constrained System-on-a-Chip Test-Scheduling Using a Genetic Algorithm

Harmanani, H.M., Salamy, H.A.

Year:

2005

Language:

english

File:

PDF, 197 KB

english, 2005

28

[IEEE 2008 Canadian Conference on Electrical and Computer Engineering - CCECE - Niagara Falls, ON, Canada (2008.05.4-2008.05.7)] 2008 Canadian Conference on Electrical and Computer Engineering - An Ant Colony Optimization approach for test pattern generation

Farah, Rana, Harmanani, Haidar M.

Year:

2008

Language:

english

File:

PDF, 100 KB

english, 2008

29

[IEEE 2007 Canadian Conference on Electrical and Computer Engineering - Vancouver, BC, Canada (2007.04.22-2007.04.26)] 2007 Canadian Conference on Electrical and Computer Engineering - A Method for Optimizing Test Bus Assignment and Sizing for System-on-a-Chip

Harmanani, Haidar M., Sawan, Rachel

Year:

2007

Language:

english

File:

PDF, 157 KB

english, 2007

30

[IEEE 2007 Joint 50th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS) and the IEEE Northeast Workshop on Circuits and Systems (NEWCAS 2007) - Montreal, QC, Canada (2007.08.5-2007.08.8)] 2007 50th Midwest Symposium on Circuits and Systems - Integrated test scheduling, wrapper design, and TAM assignment for hierarchical SOC

Harmanani, Haidar M., Farah, Rana

Year:

2007

Language:

english

File:

PDF, 240 KB

english, 2007

31

A SIMULATED ANNEALING ALGORITHM FOR SYSTEM-ON-CHIP TEST SCHEDULING WITH, POWER AND PRECEDENCE CONSTRAINTS

HARMANANI, HAIDAR M., SALAMY, HASSAN A.

Journal:

International Journal of Computational Intelligence and Applications

Year:

2006

Language:

english

File:

PDF, 295 KB

english, 2006

32

POWER-CONSTRAINED SYSTEM-ON-A-CHIP TEST SCHEDULING USING A GENETIC ALGORITHM

HARMANANI, HAIDAR M., SALAMY, HASSAN A.

Journal:

Journal of Circuits System and Computers

Year:

2006

Language:

english

File:

PDF, 244 KB

english, 2006

33

A PARALLEL GENETIC ALGORITHM FOR THE GEOMETRICALLY CONSTRAINED SITE LAYOUT PROBLEM WITH UNEQUAL-SIZE FACILITIES

HARMANANI, HAIDAR M., ZOUEIN, PIERRETTE P., HAJAR, AOUNI M.

Journal:

International Journal of Computational Intelligence and Applications

Year:

2004

Language:

english

File:

PDF, 309 KB

english, 2004

34

AN EVOLUTIONARY ALGORITHM FOR THE ALLOCATION PROBLEM IN HIGH-LEVEL SYNTHESIS

HARMANANI, HAIDAR M., SALIBA, RONY

Journal:

Journal of Circuits System and Computers

Year:

2005

Language:

english

File:

PDF, 321 KB

english, 2005

35

[ACM Press the 28th conference - San Francisco, California, United States (1991.06.17-1991.06.22)] Proceedings of the 28th conference on ACM/IEEE design automation conference - DAC '91 - A data path synthesis method for self-testable designs

Papachristou, Christos A., Chiu, Scott, Harmanani, Haidar

Year:

1991

Language:

english

File:

PDF, 756 KB

english, 1991

36

[ACM Press the 30th international - Dallas, Texas, United States (1993.06.14-1993.06.18)] Proceedings of the 30th international on Design automation conference - DAC '93 - An approach for redesigning in data path synthesis

Papachristou, Christos, Harmanani, Haidar, Nourani, Mehrdad

Year:

1993

Language:

english

File:

PDF, 648 KB

english, 1993

37

[IEEE 2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS) - Marseille, France (2014.12.7-2014.12.10)] 2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS) - Efficient shaped quantizer dithering implementation for sigma delta modulators

Anabtawi, Nijad, Ferzli, Rony, Harmanani, Haidar M.

Year:

2014

Language:

english

File:

PDF, 426 KB

english, 2014

38

[IEEE 2015 12th International Conference on Information Technology - New Generations (ITNG) - Las Vegas, NV, USA (2015.4.13-2015.4.15)] 2015 12th International Conference on Information Technology - New Generations - A Parallel GPU Implementation of the Timber Wolf Placement Algorithm

Al-Kawam, Ahmad, Harmanani, Haidar M.

Year:

2015

File:

PDF, 565 KB

2015

39

[American Society of Civil Engineers Eighth International Conference on Computing in Civil and Building Engineering (ICCCBE-VIII) - Stanford, California, United States (August 14-16, 2000)] Computing in Civil and Building Engineering (2000) - An Evolutionary Algorithm for Solving the Geometrically Constrained Site Layout Problem

Harmanani, H., Zouein, P., Hajar, A.

Year:

2000

Language:

english

File:

PDF, 419 KB

english, 2000

40

[IEEE 2015 12th International Conference on Information Technology - New Generations (ITNG) - Las Vegas, NV, USA (2015.4.13-2015.4.15)] 2015 12th International Conference on Information Technology - New Generations - A Parallel GPU Implementation of the Timber Wolf Placement Algorithm

Al-Kawam, Ahmad, Harmanani, Haidar M.

Year:

2015

Language:

english

File:

PDF, 565 KB

english, 2015

41

[IEEE 2015 IEEE International Conference on Information Reuse and Integration (IRI) - San Francisco, CA, USA (2015.8.13-2015.8.15)] 2015 IEEE International Conference on Information Reuse and Integration - An Ant Colony Optimization Heuristic to Optimize Prediction of Stability of Object-Oriented Components

Harmanani, Haidar, Azar, Danielle, Zgheib, Grace, Kozhaya, David

Year:

2015

Language:

english

File:

PDF, 856 KB

english, 2015

42

[IEEE 2000 Canadian Conference on Electrical and Computer Engineering Conference Proceedings. Navigating to a New Era - Halifax, NS, Canada (7-10 March 2000)] 2000 Canadian Conference on Electrical and Computer Engineering. Conference Proceedings. Navigating to a New Era (Cat. No.00TH8492) - An evolutionary approach for data path synthesis

Harmanani, H.M., Saliba, R.

Year:

2000

Language:

english

File:

PDF, 412 KB

english, 2000

43

[IEEE Canadian Conference on Electrical and Computer Engineering 2001. Conference Proceedings - Toronto, Ont., Canada (13-16 May 2001)] Canadian Conference on Electrical and Computer Engineering 2001. Conference Proceedings (Cat. No.01TH8555) - A genetic algorithm for testable data path synthesis

Harmanani, H., Saliba, R., Khoury, M.

Year:

2001

Language:

english

File:

PDF, 537 KB

english, 2001

44

An outcome-based assessment process for accrediting computing programmes

Harmanani, Haidar M.

Journal:

European Journal of Engineering Education

Year:

2016

Language:

english

File:

PDF, 2.50 MB

english, 2016

45

Concurrent BIST Synthesis and Test Scheduling Using Genetic Algorithms

Harmanani, H.M., Hajar, A.M.K.

Journal:

International Journal of Computers and Applications

Year:

2007

Language:

english

File:

PDF, 550 KB

english, 2007

46

[IEEE 9th International Conference on Electronics, Circuits and Systems (ICECS 2002) - Dubrovnik, Croatia (15-18 Sept. 2002)] 9th International Conference on Electronics, Circuits and Systems - An evolutionary algorithm for the testable allocation problem in high-level synthesis

Harmanani, H., Saliba, R.

Year:

2002

Language:

english

File:

PDF, 372 KB

english, 2002

47

A Strength Pareto Evolutionary Algorithm for Optimizing System-On-Chip Test Schedules

Marrouche, Wissam, Farah, Rana, Harmanani, Haidar M.

Journal:

International Journal of Computational Intelligence and Applications

Year:

2018

Language:

english

File:

PDF, 1002 KB

english, 2018

48

A Novel Federated Fog Architecture Embedding Intelligent Formation

Shamseddine, Hala, Nizam, Jana, Hammoud, Ahmad, Mourad, Azzam, Otrok, Hadi, Harmanani, Haidar, Dziong, Zbigniew

Journal:

Year:

2020

File:

PDF, 1.00 MB

2020